For Immediate Release
Silicon
Frontline Technology’s Software Qualifies for TSMC’s Unified Interconnect Modeling Format iRCX
for 40 and 65nm Processes
Los Gatos, CA – July 9, 2009 – Silicon Frontline Technology, Inc. (SFT) announced today that its 3D extraction software for post-layout verification, F3D (Fast 3D), has been qualified by TSMC for its 40 nanometer (nm) and 65nm processes as the tool supports TSMC’s new iRCX format to improve parasitic extraction and modeling accuracy, and ensures EDA tool interoperability for high performance chip designs.
Silicon
Frontline post-layout verification software produces accuracy
and high performance by using rigorous 3D technology to extract
parasitics.
Users have the option to specify the level of accuracy desired, net by
net, at
the block level or with regular expressions. With this technology,
Silicon
Frontline is ensuring the resulting parasitics are
correct within the user-specified accuracy.
“We
are pleased to have the world’s leading
foundry, TSMC, qualify our 3D extraction software for post-layout
verification
of designs targeting its 40 and 65nm processes,” said Yuri Feinberg,
CEO. “With
our software, TSMC’s customers can achieve required
accuracy with full chip capacity and performance.”
“Through
the TSMC Open Innovation PlatformTM,
TSMC collaborates with multiple EDA suppliers to create and qualify
design
tools for designs targeting our advanced semiconductor processes,” added
Tom
Quan, deputy director, Design Service Marketing at TSMC. “Silicon
Frontline’s
3D extraction software is one of the first EDA tools that passes our
iRCX
Qualification Program, and is now ready to be used by our customers.”
Silicon Frontline
announced the company and its first EDA software products in May.
TSMC
announced its iRCX format on May 27, 2009.
About
TSMC’s iRCX Format
iRCX is an open and
interoperable EDA data format that supports TSMC’s 65nm and 40nm
technology
files. The unified iRCX format ensures the accuracy of
resistance/capacitance
(RC) extractors, electromigration (EM) tools, power integrity analysis
tools
and electromagnetic simulators. It is the first of several interoperable
EDA
interface formats co-developed between TSMC and its design tool partners
as
part of the TSMC Open Innovation Platform.
About
Silicon Frontline
Silicon
Frontline
Technology, Inc. provides post-layout
verification software that is Guaranteed
Accurate and works with existing design flows from major EDA
vendors. Using
new 3D technology, the company’s software products improve silicon
quality for
standard and advanced nanometer processes. For more information please
visit www.siliconfrontline.com.
Silicon
Frontline Technology is headquartered at
-End-
Press
Contact: Georgia Marszalek, ValleyPR LLC, +1 650 345
7477, Georgia@ValleyPR.com
Notes
to editors:
Acronyms
and Definitions
3D:
3-Dimensional
CAD:
Computer-Aided Design
EDA:
Electronic Design Automation
TCAD:
Technology Computer-Aided Design
All
trademarks and tradenames are the property of their respective holders.