S

ilicon Frontline Technology has developed new proprietary 3D extraction technology with speeds significantly better than pattern based tools. Silicon Frontline patent pending approach  allows for 3D field solver accuracy on every net along with high performance throughput. SFT believes that design teams do not need to give up accuracy due to run time or flow integration issues. SFT tools run seamlessly in your existing design flow and generate  DSPF net list tuned for analysis tools.

The Frontline team has a proven track record as the lead developers at Nassda where they pioneered and developed the first hierarchical fast SPICE simulation engine. Silicon Frontline next generation extraction tools are developed not only to solve  current extraction issues but also those associated with 65nm, 45nm and 32nm process nodes.

 

Silicon Frontline in the News

Aptina Picks Silicon Frontline’s Post-Layout Verification EDA Software

Silicon Frontline F3D & R3D Product Announcement

Silicon Frontline Technology’s Software Qualifies for TSMC’s Unified Interconnect Modeling Format iRCX for 40 and 65nm Processes

UMC Qualifies Silicon Frontline's Parasitic Extraction Software for 40 and 65nm Processes

EEtimes- Startup launches post-layout verification tools

SCDsource- Silicon Frontline Aims at Post-Layout Verification