Silicon Frontline is a leading provider in layout analysis. Power device analysis, IRDrop and EM analysis, ESD analysis and Parasitic Extraction are a few of the areas we focus on.

Our software tools are used by the leading semiconductor companies, including foundries, fab and fabless companies and major system houses.


Silicon Frontline Technology, Inc./HR
4030 Moorpark Ave, Suite 249
San Jose CA 95117 or
Fax: 408 531 6076

Currently Hiring

Applications Engineer

Pre-sales support, post sales support, ability to understand customer requirements and transfer the information to engineering are the basic requirements for the job. Presentation skills, experience in using standard EDA tools and flows is a plus and circuit design experience is a major benefit. As you will be interfacing on a daily basis with customers, inter-personal skills are a necessity.

A reasonable amount of travel is required, including visiting customer sites and supporting trade shows and conferences.

Software Engineers


  • Develop software for ESD analysis of physical layouts using C++, Tcl, Ruby and Python.
  • Develop ESD simulation models from TLP measurement data.
  • Implement software checks to verify ESD tests – HBM, MM and CDM.
  • Write C++ routines to provide ‘what-if’ analysis by altering routing and physical attributes of the layout.
  • Produce program code in C++ for automating all esd checks and build it into a front end GUI.
  • Communicate regularly with customers to identify and understand the product requirements and build product specification based on that input to create correct and reliable production worthy code.
  • Develop analysis techniques to identify ESD failures, quantify the causes of such failures and automatically generate appropriate corrections.
  • Create automated methods to identify ESD devices and create models to represent them. Methods developed must be able to recognize devices that may act as an ESD device but are not specifically designed as such.
  • Develop methodologies to detect devices susceptible to damage due to the buildup of very high voltage (over voltage stress) across them.


MS in EE, Engineering, Math or related

Job site

San Jose, CA

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