Campbell, CA – March 6, 2012 – Silicon Frontline Technology, Inc. (SFT) an Electronic Design Automation (EDA) company, in the post-layout verification market, announced today that Integrated Device Technology, Inc. , the Analog and Digital Company™ delivering essential mixed-signal semiconductor solutions, is using Silicon Frontline’s R3D software for fast, resistive 3D extraction. R3D improves the reliability and efficiency of semiconductor power devices offered by IDT.

“After extensive evaluations of various options, we determined that Silicon Frontline’s R3D software is the best approach available in terms of speed, accuracy and usability to meet the reliability and efficiency goals of our power device designs,” stated Scott Woods, Director Design Automation at IDT.

“We are proud to have IDT select R3D to verify and improve the quality of their power devices, said Yuri Feinberg, SFT CEO. “With today’s requirements to support multiple power domains, the demands on power device designers continue to escalate. Optimizing today’s power device designs for reliability and efficiency can only be achieved with R3D post-layout extraction software.”

Why 3D Extraction Is Important for Power Device Design
The quality of a power device is determined by its efficiency and reliability. While efficiency is determined by the Rdson (a lower Rdson providing higher efficiency), current density is a major contributor to reliability. As power devices do not adhere to the typical rectangular routing, traditional extraction techniques fail to provide the desired results. Similar challenges exist for simulation, as the complexity of the design requires handling many million devices, which even if the capacity can be handled leads to overly long runtimes.

Silicon Frontline’s R3D combines 3D extraction with a new analysis engine to handle the accuracy and capacity requirements with a fast turnaround. To date R3D has been adopted by over 20 customers and applied to MOS, DMOS, LDMOS, vertical DMOS, waffle-style and GaN HEMT designs.

About Silicon Frontline’s Products and Customers
F3D (Fast 3D) is used for fast 3D extraction and R3D (Resistive 3D) is used for 3D extraction and analysis of large resistive structures. F3D is chosen for its nanometer and Analog Mixed Signal (A/MS) design verification accuracy, and R3D for analysis that leads to improvements in the reliability and efficiency of semiconductor power devices. H3D is the industry’s first commercial hierarchical 3D extractor, for post-layout verification. H3D offers hierarchical parasitic extraction, hierarchical netlisting, unlimited capacity, and field-solver accuracy.

SFT’s products work with design flows from the leading EDA suppliers. The company’s customers are in North America, Japan, Asia and Europe. Target markets include memory, Analog Mixed Signal (A/MS), image sensors, power devices and high-speed nanometer designs.

About Silicon Frontline
Silicon Frontline Technology, Inc. provides post-layout verification software that is Guaranteed Accurate and works with existing design flows from major EDA vendors. Using new 3D technology, the company’s software products improve silicon quality for standard and advanced nanometer processes. For more information please visit www.siliconfrontline.com. For sales or general assistance, please email info@SiliconFrontline.com.

Press Contact:
Georgia Marszalek, ValleyPR LLC, +1 650 345 7477, Georgia@ValleyPR.com

Notes to editors:

Acronyms and Definitions
A/MS: Analog Mixed Signal
DMOS: Double-diffused Metal Oxide Semiconductor
EDA: Electronic Design Automation
GaN: Gallium Nitride
HEMT: High Electron Mobility Transistor
LDMOS: Laterally Diffused Metal Oxide Semiconductor
MOS: Metal Oxide Semiconductor
R3D: Resistive 3D
Rdson: Resistance from drain to source

All trademarks and tradenames are the property of their respective holders.

Campbell, Calif.– February 2, 2012 – Silicon Frontline Technology, Inc. (SFT), an Electronic Design Automation (EDA) company in the post-layout verification market, announced today that X-FAB Silicon Foundries has used SFT’s R3D (Resistive 3D) software for X-FAB’s 0.18 micrometer high-voltage process (XH018), providing improvements in reliability and efficiency. X-FAB is the world’s leading foundry group for More-than-Moore semiconductor applications.

X-FAB’s XH018 modular mixed-signal CMOS technology can be integrated with high-voltage (HV) and non-volatile memory (NVM) modules, making it ideal for SOC applications in the automotive market and embedded NVM applications in the communications, consumer and industrial markets. R3D is used for extraction and analysis of power devices. The combination of SFT’s R3D software and X-FAB’s 0.18 micrometer process supports advanced electronic designs targeting mixed-signal applications with HV and NVM modules.

“Our customers are seeking ways to design more reliable and efficient SOCs for their automotive, power management and NVM embedded applications,” stated Thomas Ramsch, Director Design Support at X-FAB. “After extensive evaluations, we decided to start using Silicon Frontline’s R3D software for our XH018 process. R3D enhances our customers’ SOC design quality and time to market with its powerful analysis and visualization of current density, potential distribution and IR drop. Therefore, we will offer XH018 Pcells for driver integration as part of our PDK by early March, giving customers a way to check their layout, optimize Rdson and do reliability checks.”

X-FAB manufactures wafers for automotive, industrial, consumer, medical, and other applications on modular CMOS and BiCMOS processes in geometries ranging from 1.0 to 0.13 micrometers, and offers special BCD, SOI and MEMS long-lifetime processes. It is recognized for solid, specialized expertise in advanced analog and mixed-signal process technologies, and maintains a high level of responsiveness, service and technical support for its customers.

“We are proud to add X-FAB to the list of the leading foundries that have qualified our 3D post-layout software for their advanced mixed-signal processes,” said Yuri Feinberg, SFT CEO. “We believe that our R3D’s analysis software is ideal for improving X-FAB’s customers’ design efficiency and reliability.”

About R3D

Silicon Frontline’s R3D combines 3D extraction with a new analysis engine to handle the accuracy and capacity requirements with a fast turnaround. To date, R3D has been adopted by more than 20 customers and applied to MOS, DMOS, LDMOS, vertical DMOS, waffle-style and GaN HEMT designs.

About Silicon Frontline’s Products and Customers

F3D (Fast 3D) is used for fast 3D extraction and R3D (Resistive 3D) is used for 3D extraction and analysis of large resistive structures. F3D is chosen for its nanometer and Analog Mixed Signal (A/MS) design verification accuracy, and R3D for analysis that leads to improvements in the reliability and efficiency of semiconductor power devices. H3D is the industry’s first commercial hierarchical 3D extractor for post-layout verification. H3D offers hierarchical parasitic extraction, hierarchical netlisting, unlimited capacity and field-solver accuracy.

SFT’s products work with design flows from the leading EDA suppliers. The company’s customers are in North America, Japan, Asia and Europe. Target markets include memory, Analog Mixed Signal (A/MS), image sensors, power devices and high-speed nanometer designs.

About Silicon Frontline

Silicon Frontline Technology, Inc. provides post-layout verification software that is Guaranteed Accurate and works with existing design flows from major EDA vendors. Using new 3D technology, the company’s software products improve silicon quality for standard and advanced nanometer processes. For more information please visit www.siliconfrontline.com. For sales or general assistance, please email info@SiliconFrontline.com.

-End-

Press Contact:

Georgia Marszalek, ValleyPR LLC, +1 650 345 7477, Georgia@ValleyPR.com

Incomplete verification coverage or inaccurate analysis force designers to add large guardbands, and to sign off with only partial layout verification completed. Performance and yield impact often require expensive silicon debug, redesign and respins to repair.

For designers tired of the constraints forced on them by inefficient and inaccurate layout verification, H3D is a hierarchical extraction tool, delivering superior sub-linear performance, with guaranteed 3D accuracy, for fullchip verification. Compared to traditional tools that require designers to compromise coverage and precision, H3D delivers full-chip guaranteed accuracy, permitting stringent schedules to be met with confidence.

H3D Datasheet

San Diego, CA

Who/What

Silicon Frontline Technology, Inc. (SFT), an Electronic Design Automation (EDA) company, in the post-layout verification market focused on solutions for nanometer design applications, is attending the 48^th Design Automation Conference (DAC) in San Diego and will show its newest product H3D, the industry’s first commercial 3D hierarchical extractor for post-layout verification. H3D offers hierarchical parasitic extraction, hierarchical netlisting, unlimited capacity and field-solver accuracy. H3D works with design flows from the industry’s leading suppliers.

When/Where

Exhibits

9am-6pm, Monday, June 6, Tuesday, June 7, and Wednesday, June 8, 2011

Booth # 3017

San Diego Convention Center

San Diego, CA

For More Information

To set an appointment, please email info@SiliconFrontline.com.

For more information DAC, please visit http://www.dac.com.

For more information about Silicon Frontline Technology, please visit www.siliconfrontline.com.

About Silicon Frontline’s Products and Guaranteed Accuracy

Silicon Frontline’s post-layout verification software delivers Guaranteed Accuracy, full-chip capacity and performance at least 20 times faster than other commercial field solvers. Users specify the level of accuracy desired, net by net, at the block level or with regular expressions. In this way, the resulting parasitics are guaranteed correct within the specified accuracy range for better design quality.

Silicon Frontline’s software has been used to accurately verify over 300 electronic designs to date. The company’s customers use its software to analyze power devices, improve image sensors, ADCs, flash memories, differential signals and nanometer and Analog Mixed Signal (A/MS) designs. The customer list includes 10 of the world’s top 30 semiconductor companies. In addition, leading foundries have validated Silicon Frontline’s products for use with their nanometer design technologies and reference flows.

F3D (Fast 3D) is used for fast 3D extraction and R3D (Resistive 3D) is used for 3D extraction and analysis of large resistive structures. F3D is chosen for its nanometer and Analog Mixed Signal (A/MS) design verification accuracy, and R3D for analysis that leads to improvements in the reliability and efficiency of semiconductor power devices.

About Silicon Frontline

Silicon Frontline Technology, Inc. provides post-layout verification software that is Guaranteed Accurate and works with existing design flows from major EDA vendors. Using new 3D technology, the company’s software products improve silicon quality for standard and advanced nanometer processes. For more information please visit www.siliconfrontline.com. For sales or general assistance, please email info@SiliconFrontline.com or sft@marubeni-sys.com.

-End-

Press Contact:

Georgia Marszalek, ValleyPR LLC, +1 650 345 7477, Georgia@ValleyPR.com

All trademarks and tradenames are the property of their respective holders.

Campbell, CA, May 18, 2011 – Silicon Frontline Technology, Inc. (SFT), an Electronic Design Automation (EDA) company, in the post-layout verification market focused on solutions for nanometer design applications, announced today that it is introducing the industry’s first commercial hierarchical 3D extractor, H3D, for post-layout verification. H3D offers hierarchical parasitic extraction, hierarchical netlisting, unlimited capacity, and field-solver accuracy. H3D works with design flows from the leading EDA suppliers.

“Post-layout verification is a major bottleneck in today’s leading edge designs,” said Yuri Feinberg, CEO. “With the introduction of H3D, this bottleneck is removed by providing an accurate extractor that runs with sub-linear performance and delivers a hierarchical output which enables post-layout simulation speed up.”

H3D Information

As a hierarchical extractor, H3D is ideally suited for array-based and repetitive design structures, including memories, FPGAs, and image sensors.

Based on Silicon Frontline’s patented technology, H3D’s extraction performance is sub-linear, which ensures as design size grows extraction performance improves. By providing a hierarchical output netlist, post-layout simulation performance becomes sub-linear when using hierarchical simulators.

H3D hierarchical extraction results are design dependent, but have shown performance improvements from 20-120x when compared to flat extraction.

Built on a Hierarchical Random Walk Algorithm, users have the ability to specify the accuracy required on a net by net or block by block basis. H3D provides unlimited capacity due to its hierarchical extraction and parallelization.

The hierarchical output supports R, C, distributed RC and RCCc.

Price and Availability

H3D is shipping early Q3. For pricing information, please contact sales@siliconfrontline.com

About Silicon Frontline’s Products and Guaranteed Accuracy

Silicon Frontline’s post-layout verification software delivers Guaranteed Accuracy, full-chip capacity and performance at least 20 times faster than other commercial field solvers. Users specify the level of accuracy desired, net by net, at the block level or with regular expressions. In this way, the resulting parasitics are guaranteed correct within the specified accuracy range for better design quality.

Silicon Frontline’s software has been used to accurately verify over 300 electronic designs to date. The company’s customers use its software to analyze power devices, improve image sensors, ADCs, flash memories, differential signals and nanometer and Analog Mixed Signal (A/MS) designs. The customer list includes 10 of the world’s top 30 semiconductor companies. In addition, leading foundries have validated Silicon Frontline’s products for use with their nanometer design technologies and reference flows.

F3D (Fast 3D) is used for fast 3D extraction and R3D (Resistive 3D) is used for 3D extraction and analysis of large resistive structures. F3D is chosen for its nanometer and Analog Mixed Signal (A/MS) design verification accuracy, and R3D for analysis that leads to improvements in the reliability and efficiency of semiconductor power devices.

About Silicon Frontline

Silicon Frontline Technology, Inc. provides post-layout verification software that is Guaranteed Accurate and works with existing design flows from major EDA vendors. Using new 3D technology, the company’s software products improve silicon quality for standard and advanced nanometer processes. For more information please visit www.siliconfrontline.com. For sales or general assistance, please email info@SiliconFrontline.com or sft@marubeni-sys.com.

-End-

Press Contact:

Georgia Marszalek, ValleyPR LLC, +1 650 345 7477, Georgia@ValleyPR.com

All trademarks and tradenames are the property of their respective holders.

Who

Silicon Frontline Technology, Inc. (SFT), an Electronic Design Automation (EDA) company, in the post-layout verification market focused on solutions for nanometer design applications, is attending the select events in May and June: the 23rd International Symposium On Power Semiconductor Devices and ICs (ISPSD) and the 48^th Design Automation Conference (DAC) in San Diego, and the International Image Sensor Workshop (IISW) in Hokkaido, Japan

At ISPSD, Dr. Maxim Ershv, CTO of SFT, will present a tutorial on Physics, Challenges, and Solutions of Metal Layout Designs for Large Area Power Devices. At DAC, SFT will showcase its flagship Guaranteed Accurate products, F3D (Fast 3D) and R3D (Resistive 3D), as well as its new products. At IISW, Dr. Ershov will present a paper jointly written with authors from Silicon Frontline’s customer, Aptina, a leading provider of CMOS image sensors, titled Accurate capacitance and RC extraction software tool for pixel, sensor and precision analog designs.

What/When/Where

ISPSD’11

Short Course

Physics, Challenges, and Solutions of Metal Layout Designs for Large Area Power

Devices

Dr. Maxim Ershov, Silicon Frontline Technology

4-5:15pm, Sunday, May 22, 2011

Paradise Point Resort

San Diego, CA

DAC

Exhibits

9am-6pm, Monday, June 6, Tuesday, June 7, and Wednesday, June 8,011

Booth # 3017

San Diego Convention Center

San Diego, CA

International Image Sensor Workshop (IISW)

June 8-11

Paper

Accurate capacitance and RC extraction software tool for pixel, sensor and precision analog designs

M. Ershov, M. Cadjan, Y. Feinberg, X. Li, G.C. Wan and G. Agranov

Ōnuma Quasi-National Park

Hokkaido, Japan

For More Information

For more information about Silicon Frontline Technology, please visit www.siliconfrontline.com.

To set an appointment, please email info@SiliconFrontline.com or sft@marubeni-sys.com.

For more information about the events, please visit http://www.ispsd2011.com,

http://www.dac.com, and http://www.imagesensors.org.

About Silicon Frontline’s Products

F3D (Fast 3D) is used for fast 3D extraction and R3D (Resistive 3D) is used for 3D extraction and analysis of large resistive structures. F3D is chosen for its nanometer and Analog Mixed Signal (A/MS) design verification accuracy, and R3D for analysis that leads to improvements in the reliability and efficiency of semiconductor power devices.

Silicon Frontline’s software has been used to accurately verify over 300 electronic designs to date. The company’s customers use its software to analyze power devices, improve image sensors, ADCs, flash memories, differential signals and nanometer and Analog Mixed Signal (A/MS) designs. The customer list includes 10 of the world’s top 30 semiconductor companies. In addition, leading foundries have validated Silicon Frontline’s products for use with their nanometer design technologies and reference flows.

About Silicon Frontline

Silicon Frontline Technology, Inc. provides post-layout verification software that is Guaranteed Accurate and works with existing design flows from major EDA vendors. Using new 3D technology, the company’s software products improve silicon quality for standard and advanced nanometer processes. For more information please visit www.siliconfrontline.com.

-End-

Press Contact:

Georgia Marszalek, ValleyPR LLC, +1 650 345 7477, Georgia@ValleyPR.com

All trademarks and tradenames are the property of their respective holders.

“Our highly sensitive ADC circuits have a very tight tolerance and we found that only Silicon Frontline’s F3D was capable of delivering the results we needed with exceptional performance and the required accuracy,” said Dr. Yu, Director of Faraday. “The matching of differential signals is critical in analog designs and F3D was able to highlight if and when any differences occurred.”

Silicon Frontline’s post-layout verification software delivers Guaranteed Accuracy, full-chip capacity and performance at least 20 times faster than other commercial field solvers. Users specify the level of accuracy desired, net by net, at the block level or with regular expressions. In this way, the resulting parasitics are guaranteed correct within the specified accuracy range for better design quality.

“Our 3D post-layout verification software continues to be accepted and used by the world’s leading semiconductor companies,” said Yuri Feinberg, CEO. “We are proud to have Faraday choose our highly accurate 3D post-layout extraction software product, F3D, for post-layout verification of its ADCs.

Silicon Frontline’s software has been used to accurately verify over 300 electronic designs to date. The company’s customers use its software to analyze power devices, improve image sensors, ADCs, flash memories, differential signals and nanometer and Analog Mixed Signal designs. The customer list includes 10 of the world’s top 30 semiconductor companies. In addition, leading foundries have validated Silicon Frontline’s products for use with their nanometer design technologies and reference flows.

R3D is a resistive 3D extraction and analysis product for large resistive structures like power devices. Efficiency and reliability are key design criteria and R3D provides a solution to calculate and optimize both.

The current density, potential distribution and sensitivity analysis provided, allows users to quickly identify the critical areas of their design and improve the design for electromigration and IR Drop, improving reliability.

By using Rdson and the RC distributed netlist, efficiency improvements are quickly achievable, reducing both static and switching losses.

R3D provides the ability to optimize metal layouts, sense device location, bondpads and metal slotting, further improving the efficiency and reliability.

R3D Datasheet

F3D applications include Analog, AMS, IP and Digital designs which require very accurate parasitic data to drive timing, noise, and electrical analysis sign-off solutions.